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PIC16F1847_13 Datasheet, PDF (92/440 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with XLP Technology | |||
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PIC16(L)F1847
REGISTER 8-5: PIE4: PERIPHERAL INTERRUPT ENABLE REGISTER 4
U-0
â
bit 7
U-0
U-0
U-0
U-0
U-0
â
â
â
â
â
R/W-0/0
BCL2IE
R/W-0/0
SSP2IE
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
â1â = Bit is set
W = Writable bit
x = Bit is unknown
â0â = Bit is cleared
U = Unimplemented bit, read as â0â
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-2
bit 1
bit 0
Unimplemented: Read as â0â
BCL2IE: MSSP2 Bus Collision Interrupt Enable bit
1 = Enables the MSSP2 Bus Collision Interrupt
0 = Disables the MSSP2 Bus Collision Interrupt
SSP2IE: Master Synchronous Serial Port 2 (MSSP2) Interrupt Enable bit
1 = Enables the MSSP2 interrupt
0 = Disables the MSSP2 interrupt
Note 1: Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
DS40001453D-page 92
Preliminary
ï£ 2011-2013 Microchip Technology Inc.
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