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PIC16F1847_13 Datasheet, PDF (34/440 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with XLP Technology
PIC16(L)F1847
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bank 7
380h(1) INDF0
381h(1) INDF1
382h(1)
383h(1)
384h(1)
385h(1)
386h(1)
387h(1)
388h(1)
389h(1)
38Ah(1)
38Bh(1)
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
—
Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCE
TMR0IF
DC
INTF
C
IOCF
38Ch —
Unimplemented
38Dh —
Unimplemented
38Eh
—
Unimplemented
38Fh
—
Unimplemented
390h
—
Unimplemented
391h
—
Unimplemented
392h
—
Unimplemented
393h
—
Unimplemented
394h
IOCBP
IOCBP<7:0>
395h
IOCBN
IOCBN<7:0>
396h
IOCBF
IOCBF<7:0>
397h
—
Unimplemented
398h
—
Unimplemented
399h
—
Unimplemented
39Ah
CLKRCON
CLKREN CLKROE CLKRSLR
CLKRDC<1:0>
CLKRDIV<2:0>
39Bh
—
Unimplemented
39Ch MDCON
MDEN
MDOE
MDSLR MDOPOL
—
—
—
MDBIT
39Dh MDSRC
MDMSODIS
—
—
—
MDMS<3:0>
39Eh
MDCARL
MDCLODIS MDCLPOL MDCLSYNC
—
MDCL<3:0>
39Fh
MDCARH
MDCHODIS MDCHPOL MDCHSYNC
—
MDCH<3:0>
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
Unimplemented, read as ‘1’.
Value on
POR, BOR
Value on
all other
Resets
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
—
—
—
—
—
—
0011 0000 0011 0000
—
—
0010 ---0 0010 ---0
x--- xxxx u--- uuuu
xxx- xxxx uuu- uuuu
xxx- xxxx uuu- uuuu
DS40001453D-page 34
Preliminary
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