PIC16F1847_13 Datasheet, PDF (160/440 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with XLP Technology

PIC16(L)F1847
REGISTER 18-2: SRCON1: SR LATCH CONTROL 1 REGISTER
R/W-0/0
SRSPE
bit 7
R/W-0/0
SRSCKE
R/W-0/0
SRSC2E
R/W-0/0
SRSC1E
R/W-0/0
SRRPE
R/W-0/0
SRRCKE
R/W-0/0
SRRC2E
R/W-0/0
SRRC1E
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
SRSPE: SR Latch Peripheral Set Enable bit
1 = SR latch is set when the SRI pin is high
0 = SRI pin has no effect on the set input of the SR latch
bit 6
SRSCKE: SR Latch Set Clock Enable bit
1 = Set input of SR latch is pulsed with SRCLK
0 = SRCLK has no effect on the set input of the SR latch
bit 5
SRSC2E: SR Latch C2 Set Enable bit
1 = SR latch is set when the C2 Comparator output is high
0 = C2 Comparator output has no effect on the set input of the SR latch
bit 4
SRSC1E: SR Latch C1 Set Enable bit
1 = SR latch is set when the C1 Comparator output is high
0 = C1 Comparator output has no effect on the set input of the SR latch
bit 3
SRRPE: SR Latch Peripheral Reset Enable bit
1 = SR latch is reset when the SRI pin is high
0 = SRI pin has no effect on the Reset input of the SR latch
bit 2
SRRCKE: SR Latch Reset Clock Enable bit
1 = Reset input of SR latch is pulsed with SRCLK
0 = SRCLK has no effect on the Reset input of the SR latch
bit 1
SRRC2E: SR Latch C2 Reset Enable bit
1 = SR latch is reset when the C2 Comparator output is high
0 = C2 Comparator output has no effect on the Reset input of the SR latch
bit 0
SRRC1E: SR Latch C1 Reset Enable bit
1 = SR latch is reset when the C1 Comparator output is high
0 = C1 Comparator output has no effect on the Reset input of the SR latch
DS40001453D-page 160
Preliminary
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