PIC16F1847_13 Datasheet, PDF (138/440 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with XLP Technology

PIC16(L)F1847
16.1 ADC Configuration
When configuring and using the ADC the following
functions must be considered:
• Port configuration
• Channel selection
• ADC voltage reference selection
• ADC conversion clock source
• Interrupt control
• Result formatting
16.1.1 PORT CONFIGURATION
The ADC can be used to convert both analog and
digital signals. When converting analog signals, the I/O
pin should be configured for analog by setting the
associated TRIS and ANSEL bits. Refer to
Section 12.0 “I/O Ports” for more information.
Note:
Analog voltages on any pin that is defined
as a digital input may cause the input buf-
fer to conduct excess current.
16.1.2 CHANNEL SELECTION
There are up to 14 channel selections available:
• AN<11:0> pins
• DAC Output
• FVR (Fixed Voltage Reference) Output
Refer to Section 17.0 “Digital-to-Analog Converter
(DAC) Module” and Section 14.0 “Fixed Voltage
Reference (FVR)” for more information on these
channel selections.
The CHS bits of the ADCON0 register determine which
channel is connected to the sample and hold circuit.
When changing channels, a delay is required before
starting the next conversion. Refer to Section 16.2
“ADC Operation” for more information.
16.1.3 ADC VOLTAGE REFERENCE
The ADPREF bits of the ADCON1 register provides
control of the positive voltage reference. The positive
voltage reference can be:
• VREF+ pin
• VDD
• FVR 2.048V
• FVR 4.096V (Not available on LF devices)
The ADNREF bits of the ADCON1 register provides
control of the negative voltage reference. The negative
voltage reference can be:
• VREF- pin
• VSS
See Section 14.0 “Fixed Voltage Reference (FVR)”
for more details on the Fixed Voltage Reference.
16.1.4 CONVERSION CLOCK
The source of the conversion clock is software
selectable via the ADCS bits of the ADCON1 register.
There are seven possible clock options:
• FOSC/2
• FOSC/4
• FOSC/8
• FOSC/16
• FOSC/32
• FOSC/64
• FRC (dedicated internal oscillator)
The time to complete one bit conversion is defined as
TAD. One full 10-bit conversion requires 11.5 TAD
periods as shown in Figure 16-2.
For correct conversion, the appropriate TAD
specification must be met. Refer to the ADC conversion
requirements in Section 30.0 “Electrical
Specifications” for more information. Table 16-1 gives
examples of appropriate ADC clock selections.
Note:
Unless using the FRC, any changes in the
system clock frequency will change the
ADC clock frequency, which may
adversely affect the ADC result.
DS40001453D-page 138
Preliminary
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