PIC16F1847_13 Datasheet, PDF (215/440 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with XLP Technology

PIC16(L)F1847
24.4.1 HALF-BRIDGE MODE
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the CCPx/PxA pin, while the complementary PWM
output signal is output on the PxB pin (see
Figure 24-9). This mode can be used for Half-Bridge
applications, as shown in Figure 24-9, or for Full-Bridge
applications, where four power switches are being
modulated with two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in
Half-Bridge power devices. The value of the PDC<6:0>
bits of the PWMxCON register sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. See
Section 24.4.5 “Programmable Dead-Band Delay
Mode” for more details of the dead-band delay
operations.
Since the PxA and PxB outputs are multiplexed with the
PORT data latches, the associated TRIS bits must be
cleared to configure PxA and PxB as outputs.
FIGURE 24-8:
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
Period
Period
PxA⁽²⁾
Pulse Width
td
td
PxB⁽²⁾
(1)
(1)
(1)
td = Dead-Band Delay
Note 1: At this time, the TMRx register is equal to the
PRx register.
2: Output signals are shown as active-high.
FIGURE 24-9:
EXAMPLE OF HALF-BRIDGE APPLICATIONS
Standard Half-Bridge Circuit (“Push-Pull”)
FET
Driver
+
PxA
-
FET
Driver
PxB
Load
+
-
Half-Bridge Output Driving a Full-Bridge Circuit
FET
Driver
PxA
FET
Driver
PxB
V+
Load
FET
Driver
FET
Driver
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Preliminary
DS40001453D-page 215