PIC16F1847_13 Datasheet, PDF (265/440 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with XLP Technology

PIC16(L)F1847
25.6.4
I²C MASTER MODE START
CONDITION TIMING
To initiate a Start condition (Figure 25-26), the user
sets the Start Enable bit, SEN bit of the SSPxCON2
register. If the SDAx and SCLx pins are sampled high,
the Baud Rate Generator is reloaded with the contents
of SSPxADD<7:0> and starts its count. If SCLx and
SDAx are both sampled high when the Baud Rate
Generator times out (TBRG), the SDAx pin is driven
low. The action of the SDAx being driven low while
SCLx is high is the Start condition and causes the S bit
of the SSPxSTAT1 register to be set. Following this,
the Baud Rate Generator is reloaded with the contents
of SSPxADD<7:0> and resumes its count. When the
Baud Rate Generator times out (TBRG), the SEN bit of
the SSPxCON2 register will be automatically cleared
FIGURE 25-26: FIRST START BIT TIMING
by hardware; the Baud Rate Generator is suspended,
leaving the SDAx line held low and the Start condition
is complete.
Note 1: If at the beginning of the Start condition,
the SDAx and SCLx pins are already sam-
pled low, or if during the Start condition,
the SCLx line is sampled low before the
SDAx line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLxIF, is set, the Start condition is
aborted and the I²C module is reset into
its Idle state.
2: The Philips I²C^TM Specification states that
a bus collision cannot occur on a Start.
Write to SEN bit occurs here Set S bit (SSPxSTAT<3>)
SDAx = 1,
SCLx = 1
TBRG
TBRG
At completion of Start bit,
hardware clears SEN bit
and sets SSPxIF bit
Write to SSPxBUF occurs here
SDAx
1st bit
2nd bit
SCLx
TBRG
S
TBRG
 2011-2013 Microchip Technology Inc.
Preliminary
DS40001453D-page 265