PIC16F1847_13 Datasheet, PDF (121/440 Pages) Microchip Technology – 18/20/28-Pin Flash Microcontrollers with XLP Technology

PIC16(L)F1847
REGISTER 12-5: LATA: PORTA DATA LATCH REGISTER
R/W-x/u
R/W-x/u
U-0
R/W-x/u R/W-x/u
LATA7
LATA6
—
LATA4
LATA3
bit 7
R/W-x/u
LATA2
R/W-x/u
LATA1
R/W-x/u
LATA0
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5
bit 4-0
LATA<7:6>: RA<7:6> Output Latch Value bits⁽¹⁾
Unimplemented: Read as ‘0’
LATA<4:0>: RA<4:0> Output Latch Value bits⁽¹⁾
Note 1: Writes to PORTA are actually written to corresponding LATA register. Reads from PORTA register is return
of actual I/O pin values.
REGISTER 12-6: WPUA: WEAK PULL-UP PORTA REGISTER
U-0
—
bit 7
U-0
R/W-1/1
U-0
U-0
U-0
—
WPUA5
—
—
—
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-6
bit 5
bit 4-0
Unimplemented: Read as ‘0’
WPUA5: Weak Pull-up RA5 Control bit
If MCLRE in Configuration Words = 0, MCLR is disabled):
1 = Weak Pull-up enabled⁽¹⁾
0 = Weak Pull-up disabled
If MCLRE in Configuration Words = 1, MCLR is enabled):
Weak Pull-up is always enabled.
Unimplemented: Read as ‘0’
Note 1: Global WPUEN bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in configured as an output.
 2011-2013 Microchip Technology Inc.
Preliminary
DS40001453D-page 121