PIC17C75X Datasheet, PDF (76/320 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers

PIC17C75X
10.5 PORTE and DDRE Register
PORTE is a 4-bit bi-directional port. The corresponding
data direction register is DDRE. A '1' in DDRE config-
ures the corresponding port pin as an input. A '0' in the
DDRE register configures the corresponding port pin
as an output. Reading PORTE reads the status of the
pins, whereas writing to it will write to the port latch.
PORTE is multiplexed with the system bus. When
operating as the system bus, PORTE contains the con-
trol signals for the address/data bus (AD15:AD0).
These control signals are Address Latch Enable (ALE),
Output Enable (OE), and Write (WR). The control sig-
nals OE and WR are active low signals. The timing for
the system bus is shown in the Electrical Characteris-
tics section.
Note:
Three pins of this port are configured as
the system bus when the device’s configu-
ration bits are selected to Microprocessor
or Extended Microcontroller modes. The
other pin is a general purpose I/O or
Capture4 pin. In the two other microcon-
troller modes, RE2:RE0 are general pur-
pose I/O pins.
Example 10-5 shows an instruction sequence to initial-
ize PORTE. The Bank Select Register (BSR) must be
selected to Bank 1 for the port to be initialized. The fol-
lowing example uses the MOVLB instruction to load the
BSR register for bank selection.
EXAMPLE 10-5: INITIALIZING PORTE
MOVLB
CLRF
MOVLW
MOVWF
1
PORTE
0x03
DDRE
; Select Bank 1
; Initialize PORTE data
; latches before setting
; the data direction
; register
; Value used to initialize
; data direction
; Set RE<1:0> as inputs
; RE<3:2> as outputs
; RE<7:4> are always
; read as '0'
FIGURE 10-11: BLOCK DIAGRAM OF RE2:RE0 (IN I/O PORT MODE)
TTL
Input
Buffer
Data Bus
RD_PORTE
0 ^Port Q
D
1 ^Data
CK
WR_PORTE
Q
D
CK
RS
Note: I/O pins have protection diodes to VDD and Vss.
RD_DDRE
WR_DDRE
EX_EN
CNTL
DRV_SYS
SYS BUS
Control
DS30264A-page 76
Preliminary
© 1997 Microchip Technology Inc.