PIC17C75X Datasheet, PDF (163/320 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers

PIC17C75X
15.2.14.2 BUS COLLISION DURING A RESTART
CONDITION
During a RESTART condition, a bus collision occurs if:
a) A ’0’ is sampled on SDA when SCL goes from ’0’
to ’1’
b) SCL goes low before SDA is asserted low, indi-
cating that another master is attempting to trans-
mit a data ’1’.
When the user de-asserts SDA and the pin is allowed
to float high, the BRG is loaded with SSPADD<6:0>,
and counts down to 0. The SCL pin is then
de-asserted, and when sampled high, the SDA pin is
sampled. If SDA is low, a bus collision has occurred
(i.e. another master is attempting to transmit a data
’0’). If however SDA is sampled high then the BRG is
reloaded and begins counting. If SDA goes from high
to low before the BRG times out, no bus collision
occurs, because no two masters can assert SDA at
exactly the same time.
If, however, SCL goes from high to low before the
BRG times out and SDA has not already been
asserted, then a bus collision occurs. In this case,
another master is attempting to transmit a data ’1’ dur-
ing the RESTART condition.
If at the end of the BRG time out both SCL and SDA
are still high, the SDA pin is driven low, the BRG is
reloaded, and begins counting. At the end of the
count, regardless of the status of the SCL pin, the SCL
pin is driven low and the RESTART condition is com-
plete. (Figure 15-41)
FIGURE 15-41: BUS COLLISION DURING A RESTART CONDITION (CASE 1)
SDA
SCL
RSEN
Sample SDA when SCL goes high.
If SDA = 0, set BCLIF and release SDA and SCL
BCLIF
S
SSPIF
Cleared in software
FIGURE 15-42: BUS COLLISION DURING RESTART CONDITION (CASE 2)
TBRG
TBRG
SDA
SCL
BCLIF
RSEN
SCL goes low before SDA,
Set BCLIF. Release SDA and SCL
Interrupt cleared
in software
S
SSPIF
© 1997 Microchip Technology Inc.
Preliminary
DS30264A-page 163