PIC17C75X Datasheet, PDF (10/320 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers

PIC17C75X
FIGURE 3-1: PIC17C75X BLOCK DIAGRAM
RA0/INT
RA1/T0CKI
RA2/SS/SCL
RA3/SDI/SDA
RA4/RX1/DT1
RA5/TX1/CK1
RB0/CAP1
RB1/CAP2
RB2/PWM1
RB3/PWM2
RB4/TCLK12
RB5/TCLK3
RB6/SCK
RB7/SDO
RC0/AD0
RC1/AD1
RC2/AD2
RC3/AD3
RC4/AD4
RC5/AD5
RC6/AD6
RC7/AD7
RD0/AD8
RD1/AD9
RD2/AD10
RD3/AD11
RD4/AD12
RD5/AD13
RD6/AD14
RD7/AD15
RE0/ALE
RE1/OE
RE2/WR
RE3/CAP4
RF0/AN4
RF1/AN5
RF2/AN6
RF3/AN7
RF4/AN8
RF5/AN9
RF6/AN10
RF7/AN11
RG0/AN3
RG1/AN2
RG2/AN1/VREF-
RG3/AN0/VREF+
RG4/CAP3
RG5/PWM3
RG6/RX2/DT2
RG7/TX2/CK2
PORTA
PORTB
IR<7>
PORTC
PORTD
PORTE
PORTF
PORTG
IR<16>
WREG<8> BITOP
8 x 8 mult
ALU
PRODH PRODL
Shifter
Q1, Q2,
Q3, Q4
Chip_reset
& Other
Control
Signals
IR Latch <16>
Clock
Generator
Power-on
Reset
OSC1,
OSC2
Brown-out
Reset
VDD, VSS
Watchdog
Timer MCLR, VSS
Test Mode
Select
Test
8
8
8
BSR <7:4>
16
IR <7:0>
F1
F9
12
RAM
Address
Instruction
Decode
Read/write
Decode
for
Registers
Mapped
ROM Latch <16>
8
Buffer
Data RAM ^{Control Outputs}
in Data
Space
17C756
902 x 8
17C752
454 x 8
Data Latch
BSR
Literal
Table
Latch <16>
PCLATH<8>
Table Pointer<16>
PCH
PCL
Stack
16 ^{16 x 16}
16
Data Bus<8>
Data Latch
Program
Memory
(EPROM)
17C756
16K x 16
17C752
8K x 16
Address
Latch
16
16
Decode
AD<15:0>
PORTC,
PORTD
ALE,
WR,
OE,
PORTE
Timer0
Timer1
Timer2
Timer3
USART1
USART2
PWM1
PWM2
PWM3 Capture2
10-bit
A/D
SSP
IR<7>
Interrupt
Capture1 Capture3 Capture4 _Module
DS30264A-page 10
Preliminary
© 1997 Microchip Technology Inc.