PIC17C75X Datasheet, PDF (52/320 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers

PIC17C75X
7.7 Program Counter Module
The Program Counter (PC) is a 16-bit register. PCL,
the low byte of the PC, is mapped in the data memory.
PCL is readable and writable just as is any other regis-
ter. PCH is the high byte of the PC and is not directly
addressable. Since PCH is not mapped in data or pro-
gram memory, an 8-bit register PCLATH (PC high
latch) is used as a holding latch for the high byte of the
PC. PCLATH is mapped into data memory. The user
can read or write PCH through PCLATH.
The 16-bit wide PC is incremented after each instruc-
tion fetch during Q1 unless:
• Modified by a GOTO, CALL, LCALL, RETURN,
RETLW, or RETFIE instruction
• Modified by an interrupt response
• Due to destination write to PCL by an instruction
“Skips” are equivalent to a forced NOP cycle at the
skipped address.
Figure 7-10 and Figure 7-11 show the operation of the
program counter for various situations.
FIGURE 7-10: PROGRAM COUNTER
OPERATION
Internal data bus <8>
8
PCLATH
8
8
PCH PCL
FIGURE 7-11: PROGRAM COUNTER USING
THE CALL AND GOTO
INSTRUCTIONS
15 13 12 8 7
0
Opcode
PC<15:13>
5
3
7 54
0
8
PCLATH
8
15
87
0
PCH
PCL
Using Figure 7-10, the operations of the PC and
PCLATH for different instructions are as follows:
a) LCALL instructions:
An 8-bit destination address is provided in the
instruction (opcode). PCLATH is unchanged.
PCLATH → PCH
Opcode<7:0> → PCL
b) Read instructions on PCL:
Any instruction that reads PCL.
PCL → data bus → ALU or destination
PCH → PCLATH
c) Write instructions on PCL:
Any instruction that writes to PCL.
8-bit data → data bus → PCL
PCLATH → PCH
d) Read-Modify-Write instructions on PCL:
Any instruction that does a read-write-modify
operation on PCL, such as ADDWF PCL.
Read: PCL → data bus → ALU
Write: 8-bit result → data bus → PCL
PCLATH → PCH
e) RETURN instruction:
Stack<MRU> → PC<15:0>
Using Figure 7-11, the operation of the PC and
PCLATH for GOTO and CALL instructions is as follows:
CALL, GOTO instructions:
A 13-bit destination address is provided in the
instruction (opcode).
Opcode<12:0> → PC<12:0>
PC<15:13> → PCLATH<7:5>
Opcode<12:8> → PCLATH<4:0>
The read-modify-write only affects the PCL with the
result. PCH is loaded with the value in the PCLATH.
For example, ADDWF PCL will result in a jump within the
current page. If PC = 03F0h, WREG = 30h and
PCLATH = 03h before instruction, PC = 0320h after the
instruction. To accomplish a true 16-bit computed
jump, the user needs to compute the 16-bit destination
address, write the high byte to PCLATH and then write
the low value to PCL.
The following PC related operations do not change
PCLATH:
a) LCALL, RETLW, and RETFIE instructions.
b) Interrupt vector is forced onto the PC.
c) Read-modify-write instructions on PCL (e.g.
BSF PCL).
DS30264A-page 52
Preliminary
© 1997 Microchip Technology Inc.