PIC17C75X Datasheet, PDF (269/320 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers

PIC17C75X
Figure E-6 and Figure E-7 show Master-transmitter
and Master-receiver data transfer sequences.
When a master does not wish to relinquish the bus (by
generating a STOP condition), a repeated START con-
dition (Sr) must be generated. This condition is identi-
cal to the start condition (SDA goes high-to-low while
SCL is high), but occurs after a data transfer acknowl-
edge pulse (not the bus-free state). This allows a mas-
ter to send “commands” to the slave and then receive
the requested information or to address a different
slave device. This sequence is shown in Figure E-8.
FIGURE E-6: MASTER-TRANSMITTER SEQUENCE
For 7-bit address:
For 10-bit address:
S Slave Address R/W A Data A Data A/A P
'0' (write)
data transferred
(n bytes - acknowledge)
S Slave Address R/W A1 Slave Address A2
First 7 bits
Second byte
(write)
A master transmitter addresses a slave receiver with a
7-bit address. The transfer direction is not changed.
Data A Data A/A P
From master to slave
From slave to master
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = Start Condition
P = Stop Condition
A master transmitter addresses a slave receiver
with a 10-bit address.
FIGURE E-7: MASTER-RECEIVER SEQUENCE
For 7-bit address:
For 10-bit address:
S Slave Address R/W A Data A Data A P
'1' (read)
data transferred
(n bytes - acknowledge)
S Slave Address R/W A1 Slave Address A2
First 7 bits
Second byte
(write)
A master reads a slave immediately after the first byte.
From master to slave
From slave to master
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = Start Condition
P = Stop Condition
Sr Slave Address R/W A3 Data A Data A P
First 7 bits
(read)
A master transmitter addresses a slave receiver
with a 10-bit address.
FIGURE E-8:
COMBINED FORMAT
(read or write)
(n bytes + acknowledge)
S Slave Address R/W A Data A/A Sr Slave Address R/W A Data A/A P
(read)
Sr = repeated (write)
Start Condition
Direction of transfer
may change at this point
Transfer direction of data and acknowledgment bits depends on R/W bits.
Combined format:
Sr Slave Address R/W A Slave Address A Data A
First 7 bits
Second byte
(write)
Data A/A Sr Slave Address R/W A Data A
First 7 bits
(read)
Data A P
Combined format - A master addresses a slave with a 10-bit address, then transmits
data to this slave and reads data from this slave.
From master to slave
From slave to master
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = Start Condition
P = Stop Condition
© 1997 Microchip Technology Inc.
Preliminary
DS30264A-page 269