PIC17C75X Datasheet, PDF (133/320 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers

FIGURE 15-12: SPI MODE TIMING (SLAVE MODE WITH CKE = 1)
SS
not optional
SCK
(CKP = 0
CKE = 1)
SCK
(CKP = 1
CKE = 1)
Write to
SSPBUF
PIC17C75X
SDO
bit7
bit6
bit5
bit4
bit3
bit2
bit1 bit0
SDI
(SMP = 0)
bit7
bit0
Input
Sample
(SMP = 0)
SSPIF
Interrupt
Flag
SSPSR to
SSPBUF
TABLE 15-1: REGISTERS ASSOCIATED WITH SPI OPERATION
Address
Name
Bit 7 Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
07h, Unbanked INTSTA
PEIF T0CKIF T0IF
INTF
PEIE T0CKIE T0IE
INTE 0000 0000
10h, Bank 4 PIR2
SSPIF BCLIF ADIF
—
CA4IF CA3IF TX2IF RC2IF _{000- 0010}
11h, Bank 4 PIE2
SSPIE BCLIE ADIE
—
CA4IE CA3IE TX2IE RC2IE _{000- 0000}
14h, Bank 6 SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx
11h, Bank 6 SSPCON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 _{0000 0000}
13h, Bank 6 SSPSTAT SMP CKE
D/A
P
S
R/W
UA
BF
0000 0000
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the SSP in SPI mode.
Note 1: Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.
Value on all
other resets
(Note1)
0000 0000
000- 0010
000- 0000
uuuu uuuu
0000 0000
0000 0000
© 1997 Microchip Technology Inc.
Preliminary
DS30264A-page 133