PIC17C75X Datasheet, PDF (165/320 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers

15.3 Connection Considerations for I²C
Bus
For standard-mode I²C bus devices, the values of
resistors R_p R_s in Figure 15-45 depends on the follow-
ing parameters
• Supply voltage
• Bus capacitance
• Number of connected devices (input current +
leakage current).
The supply voltage limits the minimum value of resistor
R_p due to the specified minimum sink current of 3 mA
at VOL max = 0.4V for the specified output stages. For
example, with a supply voltage of VDD = 5V+10% and
VOL max = 0.4V at 3 mA, R_{p min} = (5.5-0.4)/0.003 =
1.7 kΩ. VDD as a function of R_p is shown in
Figure 15-45. The desired noise margin of 0.1VDD for
the low level, limits the maximum value of R_s. Series
resistors are optional.
PIC17C75X
The bus capacitance is the total capacitance of wire,
connections, and pins. This capacitance limits the max-
imum value of R_p due to the specified rise time
(Figure 15-45).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register, and controls the slew rate
of the I/O pins when in I²C mode (master or slave).
This control ensures that the rise and fall times of the
SCL and SDA pins will meet the minimum require-
ments as specified in the I²C specification for 400 kHz
operation.
FIGURE 15-45: SAMPLE DEVICE CONFIGURATION FOR I²C BUS
VDD + 10%
R_p
R_p
DEVICE
R_s R_s
SDA
SCL
NOTE: I2C devices with input levels related to VDD must have one common supply
line to which the pull up resistor is also connected.
C_b=10 - 400 pF
© 1997 Microchip Technology Inc.
Preliminary
DS30264A-page 165