PIC17C7XX_13 Datasheet, PDF (29/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
TABLE 5-4:
Register
INITIALIZATION CONDITIONS FOR SPECIAL FUNCTION REGISTERS (CONTINUED)
Address
Power-on Reset
Brown-out Reset
MCLR Reset
WDT Reset
Wake-up from SLEEP
through Interrupt
Bank 4
PIR2
10h
PIE2
11h
Unimplemented
12h
RCSTA2
13h
RCREG2
14h
TXSTA2
15h
TXREG2
16h
SPBRG2
17h
000- 0010
000- 0000
---- ----
0000 -00x
xxxx xxxx
0000 --1x
xxxx xxxx
0000 0000
000- 0010
000- 0000
---- ----
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
0000 0000
uuu- uuuu⁽¹⁾
uuu- uuuu
---- ----
uuuu -uuu
uuuu uuuu
uuuu --uu
uuuu uuuu
uuuu uuuu
Bank 5
DDRF
10h
PORTF⁽⁴⁾
11h
DDRG
12h
PORTG⁽⁴⁾
13h
ADCON0
14h
ADCON1
15h
ADRESL
16h
ADRESH
17h
1111 1111
0000 0000
1111 1111
xxxx 0000
0000 -0-0
000- 0000
xxxx xxxx
xxxx xxxx
1111 1111
0000 0000
1111 1111
uuuu 0000
0000 -0-0
000- 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
Bank 6
SSPADD
10h
0000 0000
0000 0000
uuuu uuuu
SSPCON1
11h
0000 0000
0000 0000
uuuu uuuu
SSPCON2
12h
0000 0000
0000 0000
uuuu uuuu
SSPSTAT
13h
0000 0000
0000 0000
uuuu uuuu
SSPBUF
14h
xxxx xxxx
uuuu uuuu
uuuu uuuu
Unimplemented
15h
---- ----
---- ----
---- ----
Unimplemented
16h
---- ----
---- ----
---- ----
Unimplemented
17h
---- ----
---- ----
---- ----
Legend: u = unchanged, x = unknown, - = unimplemented, read as '0', q = value depends on condition
Note 1: One or more bits in INTSTA, PIR1, PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GLINTD bit is cleared, the PC is loaded with the interrupt
vector.
3: See Table 5-3 for RESET value of specific condition.
4: This is the value that will be in the port output latch.
5: When the device is configured for Microprocessor or Extended Microcontroller mode, the operation of this
port does not rely on these registers.
6: On any device RESET, these pins are configured as inputs.
 1998-2013 Microchip Technology Inc.
DS30289C-page 29