PIC17C7XX_13 Datasheet, PDF (260/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
Param
No.
Sym
Characteristic
Min
Max Units
Conditions
110 Tbuf Bus free time
100 kHz mode
4.7
400 kHz mode
1.3
1 MHz mode⁽¹⁾
0.5
—
ms Time the bus must be free
—
ms ^{before a new transmission}
—
ms ^{can start}
D102
Note 1:
2:
3:
4:
Cb Bus capacitive loading
—
400 pF
Maximum pin capacitance = 10 pF for all I²C pins.
A fast mode (400 KHz) I²C bus device can be used in a standard mode I²C bus system, but the parameter # 107  250 ns
must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If
such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line.
Parameter #102 + #107 = 1000 + 250 = 1250 ns (for 100 kHz mode) before the SCL line is released.
C_b is specified to be from 10-400pF. The minimum specifications are characterized with C_b=10pF. The rise time spec (t_r)
is characterized with R_p=R_p min. The minimum fall time specification (t_f) is characterized with C_b=10pF,and R_p=R_p max.
These are only valid for fast mode operation (VDD=4.5-5.5V) and where the SPM bit (SSPSTAT<7>) =1.)
Max specifications for these parameters are valid for falling edge only. Specs are characterized with R_p=R_p min and
C_b=400pF for standard mode, 200pF for fast mode, and 10pF for 1MHz mode.
FIGURE 20-19: USART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TX/CK
pin
RX/DT
pin
121
120
121
122
TABLE 20-14: USART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param
No.
Sym
Characteristic
120 TckH2dtV SYNC XMIT (MASTER & SLAVE)
Clock high to data out valid
PIC17CXXX
PIC17LCXXX
121 TckRF
Clock out rise time and fall time
(Master mode)
PIC17CXXX
PIC17LCXXX
122 TdtRF
Data out rise time and fall time
PIC17CXXX
PIC17LCXXX
†
Data in “Typ” column is at 5V, 25C unless otherwise stated.
Min Typ† Max Units Conditions
— — 50
ns
— — 75
ns
— — 25
ns
— — 40
ns
— — 25
ns
— — 40
ns
DS30289C-page 260
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