PIC17C7XX_13 Datasheet, PDF (150/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
15.2.3 SLEEP OPERATION
While in SLEEP mode, the I²C module can receive
addresses or data and when an address match or com-
plete byte transfer occurs, wake the processor from
SLEEP (if the SSP interrupt is enabled).
15.2.4 EFFECTS OF A RESET
A RESET disables the SSP module and terminates the
current transfer.
TABLE 15-3: REGISTERS ASSOCIATED WITH I²C OPERATION
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POR, BOR
07h, Unbanked INTSTA
PEIF T0CKIF
T0IF
INTF PEIE T0CKIE T0IE INTE 0000 0000
10h, Bank 4 PIR2
SSPIF BCLIF
ADIF
—
CA4IF CA3IF TX2IF RC2IF 000- 0000
11h, Bank 4
10h. Bank 6
PIE2
SSPADD
SSPIE BCLIE
ADIE
—
CA4IE CA3IE
Synchronous Serial Port (I²C mode) Address Register
TX2IE
RC2IE
000- 0000
0000 0000
14h, Bank 6 SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx
11h, Bank 6 SSPCON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000
12h, Bank 6 SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000
13h, Bank 6 SSPSTAT SMP
CKE
D/A
P
S
R/W
UA
BF
0000 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the SSP in I²C mode.
MCLR, WDT
0000 0000
000- 0000
000- 0000
0000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
DS30289C-page 150
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