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PIC17C7XX_13 Datasheet, PDF (27/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D
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PIC17C7XX
TABLE 5-4: INITIALIZATION CONDITIONS FOR SPECIAL FUNCTION REGISTERS
Register
Address
Power-on Reset
Brown-out Reset
MCLR Reset
WDT Reset
Wake-up from SLEEP
through Interrupt
Unbanked
INDF0
00h
N/A
N/A
N/A
FSR0
PCL
PCLATH
ALUSTA
01h
xxxx xxxx
02h
0000h
03h
0000 0000
04h
1111 xxxx
uuuu uuuu
0000h
uuuu uuuu
1111 uuuu
uuuu uuuu
PC + 1(2)
uuuu uuuu
1111 uuuu
T0STA
05h
0000 000-
CPUSTA(3)
06h
--11 11qq
INTSTA
07h
0000 0000
INDF1
08h
N/A
0000 000-
--11 qquu
0000 0000
N/A
0000 000-
--uu qquu
uuuu uuuu(1)
N/A
FSR1
WREG
TMR0L
TMR0H
TBLPTRL
09h
xxxx xxxx
0Ah
xxxx xxxx
0Bh
xxxx xxxx
0Ch
xxxx xxxx
0Dh
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TBLPTRH
0Eh
0000 0000
0000 0000
uuuu uuuu
BSR
0Fh
0000 0000
Bank 0
PORTA(4,6)
10h
0-xx 11xx
DDRB
PORTB(4)
11h
1111 1111
12h
xxxx xxxx
RCSTA1
13h
0000 -00x
RCREG1
14h
xxxx xxxx
TXSTA1
15h
0000 --1x
0000 0000
0-uu 11uu
1111 1111
uuuu uuuu
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
u-uu uuuu
uuuu uuuu
uuuu uuuu
uuuu -uuu
uuuu uuuu
uuuu --uu
TXREG1
16h
xxxx xxxx
uuuu uuuu
uuuu uuuu
SPBRG1
17h
0000 0000
0000 0000
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented, read as '0', q = value depends on condition
Note 1: One or more bits in INTSTA, PIR1, PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GLINTD bit is cleared, the PC is loaded with the interrupt
vector.
3: See Table 5-3 for RESET value of specific condition.
4: This is the value that will be in the port output latch.
5: When the device is configured for Microprocessor or Extended Microcontroller mode, the operation of this
port does not rely on these registers.
6: On any device RESET, these pins are configured as inputs.
 1998-2013 Microchip Technology Inc.
DS30289C-page 27
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