PIC17C7XX_13 Datasheet, PDF (227/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Swap f
[ label ] SWAPF f,d
0  f  255
d  [0,1]
f<3:0>  dest<7:4>;
f<7:4>  dest<3:0>
None
0001 110d ffff ffff
The upper and lower nibbles of register
'f' are exchanged. If 'd' is 0, the result is
placed in WREG. If 'd' is 1, the result is
placed in register 'f'.
1
1
Q2
Read
register 'f'
Q3
Process
Data
Q4
Write to
destination
Example:
SWAPF REG, 0
Before Instruction
REG = 0x53
After Instruction
REG = 0x35
TABLRD
Table Read
Syntax:
[ label ] TABLRD t,i,f
Operands:
0  f  255
i [0,1]
t [0,1]
Operation:
If t = 1,
TBLATH  f;
If t = 0,
TBLATL  f;
Prog Mem (TBLPTR)  TBLAT;
If i = 1,
TBLPTR + 1  TBLPTR
If i = 0,
TBLPTR is unchanged
Status Affected: None
Encoding:
1010 10ti ffff ffff
Description:
1. A byte of the table latch (TBLAT)
is moved to register file 'f'.
If t = 1: the high byte is moved;
If t = 0: the low byte is moved.
2. Then, the contents of the pro-
gram memory location pointed to
by the 16-bit Table Pointer
(TBLPTR) are loaded into the
16-bit Table Latch (TBLAT).
3. If i = 1: TBLPTR is incremented;
If i = 0: TBLPTR is not
incremented.
Words:
1
Cycles:
2 (3-cycle if f = PCL)
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register
TBLATH or
TBLATL
Process
Data
Write
register 'f'
No
operation
No
operation
(Table Pointer
on Address
bus)
No
operation
No
operation
(OE goes low)
 1998-2013 Microchip Technology Inc.
DS30289C-page 227