PIC17C7XX_13 Datasheet, PDF (174/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
15.2.18.3 Bus Collision During a STOP
Condition
Bus collision occurs during a STOP condition if:
a) After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
b) After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to ‘0’. After the BRG times out, SDA
is sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data '0'. If the SCL pin is sampled low before
SDA is allowed to float high, a bus collision occurs. This
is another case of another master attempting to drive a
data '0' (Figure 15-40).
FIGURE 15-40:
BUS COLLISION DURING A STOP CONDITION (CASE 1)
TBRG
TBRG
TBRG
SDA
SDA sampled
low after TBRG,
Set BCLIF.
SCL
SDA asserted low.
PEN
BCLIF
P
'0'
'0'
SSPIF
'0'
'0'
FIGURE 15-41:
SDA
SCL
PEN
BCLIF
P
'0'
SSPIF ^'0'
BUS COLLISION DURING A STOP CONDITION (CASE 2)
TBRG
TBRG
TBRG
Assert SDA.
SCL goes low before SDA goes high.
Set BCLIF.
DS30289C-page 174
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