PIC17C7XX_13 Datasheet, PDF (171/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
15.2.18.1 Bus Collision During a START
Condition
During a START condition, a bus collision occurs if:
a) SDA or SCL are sampled low at the beginning of
the START condition (Figure 15-35).
b) SCL is sampled low before SDA is asserted low
(Figure 15-36).
During a START condition, both the SDA and the SCL
pins are monitored.
If:
the SDA pin is already low
or the SCL pin is already low,
then:
the START condition is aborted,
and the BCLIF flag is set,
and the SSP module is reset to its IDLE state
(Figure 15-35).
The START condition begins with the SDA and SCL
pins de-asserted. When the SDA pin is sampled high,
the baud rate generator is loaded from SSPADD<6:0>
and counts down to ‘0’. If the SCL pin is sampled low
while SDA is high, a bus collision occurs, because it is
assumed that another master is attempting to drive a
data '1' during the START condition.
If the SDA pin is sampled low during this count, the
BRG is reset and the SDA line is asserted early
(Figure 15-37). If, however, a '1' is sampled on the SDA
pin, the SDA pin is asserted low at the end of the BRG
count. The baud rate generator is then reloaded and
counts down to 0 and during this time, if the SCL pin is
sampled as '0', a bus collision does not occur. At the
end of the BRG count, the SCL pin is asserted low.
Note:
The reason that bus collision is not a factor
during a START condition is that no two
bus masters can assert a START condition
at the exact same time. Therefore, one
master will always assert SDA before the
other. This condition does not cause a bus
collision because the two masters must be
allowed to arbitrate the first address follow-
ing the START condition and if the address
is the same, arbitration must be allowed to
continue into the data portion, Repeated
Start, or Stop conditions.
FIGURE 15-35: BUS COLLISION DURING START CONDITION (SDA ONLY)
SDA
SDA goes low before the SEN bit is set.
. Set BCLIF,
S bit and SSPIF set because
SDA = 0, SCL = 1.
SCL
SEN
BCLIF
S
Set SEN, enable START
condition if SDA = 1, SCL=1.
SDA sampled low before
START condition. Set BCLIF.
S bit and SSPIF set because
SDA = 0, SCL = 1.
SEN cleared automatically because of bus collision.
SSP module reset into IDLE state.
SSPIF and BCLIF are
cleared in software.
SSPIF
SSPIF and BCLIF are
cleared in software.
 1998-2013 Microchip Technology Inc.
DS30289C-page 171