PIC17C7XX_13 Datasheet, PDF (13/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
FIGURE 3-2:
RA0/INT
RA1/T0CKI
RA2/SS/SCL
RA3/SDI/SDA
RA4/RX1/DT1
RA5/TX1/CK1
RB0/CAP1
RB1/CAP2
RB2/PWM1
RB3/PWM2
RB4/TCLK12
RB5/TCLK3
RB6/SCK
RB7/SDO
RC0/AD0
RC1/AD1
RC2/AD2
RC3/AD3
RC4/AD4
RC5/AD5
RC6/AD6
RC7/AD7
RD0/AD8
RD1/AD9
RD2/AD10
RD3/AD11
RD4/AD12
RD5/AD13
RD6/AD14
RD7/AD15
RE0/ALE
RE1/OE
RE2/WR
RE3/CAP4
RF0/AN4
RF1/AN5
RF2/AN6
RF3/AN7
RF4/AN8
RF5/AN9
RF6/AN10
RF7/AN11
RG0/AN3
RG1/AN2
RG2/AN1/VREF-
RG3/AN0/VREF+
RG4/CAP3
RG5/PWM3
RG6/RX2/DT2
RG7/TX2/CK2
RH0
RH1
RH2
RH3
RH4/AN12
RH5/AN13
RH6/AN14
RH7/AN15
PIC17C762/766 BLOCK DIAGRAM
PORTA
IR<16>
WREG<8> BITOP
PORTB
8 x 8 mult
ALU
PRODH PRODL
Shifter
Q1, Q2,
Q3, Q4
Chip_reset
& Other
Control
Signals
IR Latch <16>
Clock
Generator
Power-on
Reset
OSC1,
OSC2
Watchdog VDD, VSS
Timer
Test Mode MCLR, VPP
Select
Brown-out
Reset
Test
AVDD, AVSS
PORTC
8
8
PORTD
PORTE
PORTF
PORTG
8
BSR <7:4>
IR <7:0>
16
12
RAM
Address
Buffer
Data RAM
17C766
902 x 8
and
17C762
678 x 8
Data Latch
Instruction
Decode
Control Outputs
Read/Write
Decode
for
Registers
Mapped
in Data
Space
ROM Latch <16>
FSR0
FSR1
8
BSR
Literal
Table
Latch <16>
PCLATH<8>
Table Pointer<16>
PCH
PCL
Stack
16 ^{16 x 16}
Data Latch
Program
Memory
(EPROM)
17C766
16K x 16,
and
17C762
8K x 16
Address
Latch
16
16
Decode
AD<15:0>
PORTC,
PORTD
ALE,
WR,
OE,
PORTE
PORTH
16
Data Bus<8>
Timer0 Timer2 USART1 PWM1 PWM3
Timer1 Timer3 USART2 PWM2 Capture1
PORTJ
RJ0
RJ1
RJ2
RJ3
RJ4
RJ5
RJ6
RJ7
Interrupt
Module
SSP
10-bit
A/D
Capture2 Capture3 Capture4
 1998-2013 Microchip Technology Inc.
DS30289C-page 13