PIC17C7XX_13 Datasheet, PDF (257/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

FIGURE 20-16: SPI SLAVE MODE TIMING (CKE = 1)
82
SS
SCK
(CKP = 0)
70
71
72
SCK
(CKP = 1)
80
PIC17C7XX
83
SDO
MSb
BIT6 - - - - - -1
LSb
75, 76
77
SDI
MSb IN
BIT6 - - - -1
LSb IN
Note:
74
Refer to Figure 20-5 for load conditions.
TABLE 20-11: SPI MODE REQUIREMENTS (SLAVE MODE, CKE = 1)
Param.
No.
Symbol
Characteristic
Min
70 TssL2scH, SS to SCK or SCK input
Tcy
TssL2scL
71 TscH
71A
SCK input high time
(Slave mode)
Continuous
Single Byte
1.25TCY + 30
40
72 TscL
72A
SCK input low time
(Slave mode)
Continuous
Single Byte
1.25TCY + 30
40
73A TB2B
Last clock edge of Byte1 to the 1st clock edge
of Byte2
1.5TCY + 40
74 TscH2diL, Hold time of SDI data input to SCK edge
100
TscL2diL
75 TdoR
SDO data output rise time
—
76 TdoF
SDO data output fall time
—
77 TssH2doZ SS to SDO output hi-impedance
10
80 TscH2doV, SDO data output valid after SCK edge
—
TscL2doV
82 TssL2doV SDO data output valid after SS edge
—
83 TscH2ssH, SS  after SCK edge
TscL2ssH
1.5TCY + 40
†
Data in "Typ" column is at 5V, 25°C unless otherwise stated.
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
Typ† Max Units Conditions
— — ns
— — ns
— — ns (Note 1)
— — ns
— — ns (Note 1)
— — ns (Note 1)
— — ns
10 25 ns
10 25 ns
— 50 ns
— 50 ns
— 50 ns
— — ns
 1998-2013 Microchip Technology Inc.
DS30289C-page 257