PIC17C7XX_13 Datasheet, PDF (196/306 Pages) Microchip Technology – High-Performance 8-bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
17.6 In-Circuit Serial Programming
The PIC17C7XX group of the high-end family
(PIC17CXXX) has an added feature that allows serial
programming while in the end application circuit. This is
simply done with two lines for clock and data and three
other lines for power, ground, and the programming
voltage. This allows customers to manufacture boards
with unprogrammed devices and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware, or a custom firm-
ware to be programmed.
Devices may be serialized to make the product unique;
“special” variants of the product may be offered and
code updates are possible. This allows for increased
design flexibility.
To place the device into the Serial Programming Test
mode, two pins will need to be placed at VIHH. These
are the TEST pin and the MCLR/VPP pin. Also, a
sequence of events must occur as follows:
1. The TEST pin is placed at VIHH.
2. The MCLR/VPP pin is placed at VIHH.
There is a setup time between step 1 and step 2 that
must be met.
After this sequence, the Program Counter is pointing to
program memory address 0xFF60. This location is in
the Boot ROM. The code initializes the USART/SCI so
that it can receive commands. For this, the device must
be clocked. The device clock source in this mode is the
RA1/T0CKI pin. After delaying to allow the USART/SCI
to initialize, commands can be received. The flow is
shown in these 3 steps:
1. The device clock source starts.
2. Wait 80 device clocks for Boot ROM code to
configure the USART/SCI.
3. Commands may now be sent.
For complete details of serial programming, please
refer to the PIC17C7XX Programming Specification.
(Contact your local Microchip Technology Sales Office
for availability.)
FIGURE 17-3:
TYPICAL IN-CIRCUIT
SERIAL PROGRAMMING
CONNECTION
External
Connector
Signals
+5V
0V
VPP
TEST CNTL
Dev. CLK
Data I/O
Data CLK
To Normal
Connections
PIC17C7XX
VDD
VSS
MCLR/VPP
TEST
RA1/T0CKI
RA4/RX1/DT1
RA5/TX1/CK1
VDD
To Normal
Connections
TABLE 17-3: ICSP INTERFACE PINS
Name
RA4/RX1/DT1
RA5/TX1/CK1
RA1/T0CKI
TEST
MCLR/VPP
VDD
VSS
Function
DT
CK
OSCI
TEST
MCLR/VPP
VDD
VSS
Type
I/O
I
I
I
P
P
P
During Programming
Description
Serial Data
Serial Clock
Device Clock Source
Test mode selection control input, force to VIHH
Master Clear Reset and Device Programming Voltage
Positive supply for logic and I/O pins
Ground reference for logic and I/O pins
DS30289C-page 196
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