TC1163 Datasheet, PDF (57/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1163/TC1164
Preliminary
Functional Description
3.8
Asynchronous/Synchronous Serial Interfaces (ASC0, ASC1)
Figure 3-4 shows a global view of the functional blocks and interfaces of the two
Asynchronous/Synchronous Serial Interfaces, ASC0 and ASC1.
Clock
f_ASC
Control
A d d r e ss
De co d e r
In te r r u p t
Control
E IR
TB IR
TIR
RIR
To
DMA
ASC0_RDR
ASC0_TDR
ASC0
Module
(Kernel)
RX D_ I0
RX D_ I1
RXD_O
TXD_O
Port 3
Co n tr o l
A2
P3.0 /
RXD0A
A2
P3.1 /
TXD0A
A2
P3.12 /
RXD0B
A2
P3.13 /
TXD0B
In te r r u p t
Control
E IR
TB IR
TIR
RIR
To
DMA
ASC1_RDR
ASC1_TDR
ASC1
Module
(Kernel)
RX D_ I0
RX D_ I1
RXD_O
TXD_O
A2
P3.9 /
RXD1A
A2
P3.8 /
TXD1A
A2
P3.14 /
RXD1B
A2
P3.15 /
TXD1B
MCB06211c
Figure 3-4 Block Diagram of the ASC Interfaces
The ASC provides serial communication between the TC1163/TC1164 and other
microcontrollers, microprocessors, or external peripherals.
The ASC supports full-duplex asynchronous communication and half-duplex
synchronous communication. In Synchronous Mode, data is transmitted or received
synchronous to a shift clock that is generated by the ASC internally. In Asynchronous
Mode, 8-bit or 9-bit data transfer, parity generation, and the number of stop bits can be
Data Sheet
53
V1.0, 2008-04