TC1163 Datasheet, PDF (29/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1163/TC1164
Preliminary
Functional Description
3.2
On-Chip Memories
As shown in the TC1163/TC1164 block diagram on Page 2-6, some of the
TC1163/TC1164 units provide on-chip memories that are used as program or data
memory.
• Program memory in PMU
– 16 Kbyte Boot ROM (BROM)
– 1024 Kbyte Program Flash (PFlash)
• Program memory in PMI
– 8 Kbyte Scratch-Pad RAM (SPRAM)
– 8 Kbyte Instruction Cache (ICACHE)
• Data memory in PMU
– 16 Kbyte Data Flash (DFlash)
– 8 Kbyte Overlay RAM (OVRAM)
• Data memory in DMI
– 40 Kbyte Local Data RAM (LDRAM)
• Memory of PCP2
– 12 Kbyte Code Memory (CMEM) with parity error protection
– 8 Kbyte Parameter RAM (PRAM) with parity error protection
• On-chip SRAM with parity error protection
Features of Program Flash
• 1024 Kbyte on-chip program Flash memory
• Usable for instruction code or constant data storage
• 256-byte program interface
– 256 bytes are programmed into PFLASH page in one step/command
• 256-bit read interface
– Transfer from PFLASH to CPU/PMI by four 64-bit single cycle burst transfers
• Dynamic correction of single-bit errors during read access
• Detection of double-bit errors
• Fixed sector architecture
– Eight 16 Kbyte, one 128 Kbyte, one 256 Kbyte and one 512 Kbyte sectors
– Each sector separately erasable
– Each sector separately write-protectable
• Configurable read protection for complete PFLASH with sophisticated read access
supervision, combined with write protection for complete PFLASH (protection against
“Trojan horse” software)
• Configurable write protection for each sector
– Each sector separately write-protectable
– With capability to be re-programmed
– With capability to be locked forever (OTP)
• Password mechanism for temporary disabling of write and read protection
• On-chip generation of programming voltage
Data Sheet
25
V1.0, 2008-04