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TC1163 Datasheet, PDF (123/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore
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TC1163/TC1164
Preliminary
Electrical Parameters
4.3.7 Timing for JTAG Signals
(Operating Conditions apply, CL = 50 pF)
Table 4-15 TCK Clock Timing Parameter
Parameter
Symbol
Limit Values
TCK clock period1)
TCK high time
TCK low time
TCK clock rise time
TCK clock fall time
1) fTCK should be lower or equal to fSYS
Min.
tTCK SR 25
t1
SR 10
t2
SR 10
t3
SR –
t4
SR –
Max.
–
–
–
4
4
Unit
ns
ns
ns
ns
ns
TCK
0.5 VDD
t1
t2
tTCK
Figure 4-15 TCK Clock Timing
t4
t3
0.9 VDD
0.1 VDD
Data Sheet
119
V1.0, 2008-04
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