TC1163 Datasheet, PDF (41/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1163/TC1164
Preliminary
Functional Description
3.3.4.2 Segment 15
Table 3-4 shows the address map of segment 15 as seen from the SPB bus masters
PCP, DMA and OCDS. Please note that access in Table 3-4 means only that an access
to an address within the defined address range is not automatically incorrect or ignored.
If an access is really addressing a correct address, it can be found in the detailed tables
in the TC116x User’s Manual, Register Overview’s chapter.
Table 3-4
Unit
SPB Address Map of Segment 15
Address
Range
Size
System Control Unit (SCU) and
Watchdog Timer (WDT)
F000 0000_H - 256
F000 00FF_H byte
System Peripheral Bus Control Unit F000 0100_H - 256
(SBCU)
F000 01FF_H byte
System Timer (STM)
F000 0200_H - 256
F000 02FF_H byte
Reserved
F000 0300_H - –
F000 03FF_H
On-Chip Debug Support (Cerberus) F000 0400_H - 256
F000 04FF_H byte
Reserved
F000 0500_H - –
F000 07FF_H
MicroSecond Bus Controller 0
(MSC0)
F000 0800_H - 256
F000 08FF_H byte
Reserved
F000 0900_H - –
F000 09FF_H
Async./Sync. Serial Interface 0
(ASC0)
F000 0A00_H - 256
F000 0AFF_H byte
Async./Sync. Serial Interface 1
(ASC1)
F000 0B00_H - 256
F000 0BFF_H byte
Port 0
F000 0C00_H - 256
F000 0CFF_H byte
Port 1
F000 0D00_H - 256
F000 0DFF_H byte
Port 2
F000 0E00_H - 256
F000 0EFF_H byte
Access Type
Read
Write
access
access
access
access
access
access
SPBBE
SPBBE
access
access
SPBBE
SPBBE
access
access
SPBBE
SPBBE
access
access
access
access
access
access
access
access
access
access
Data Sheet
37
V1.0, 2008-04