TC1163 Datasheet, PDF (118/134 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller TriCore

TC1163/TC1164
Preliminary
Electrical Parameters
4) Applicable for input pins TESTMODE, TRST, BRKIN, and TXD1A with noise suppression filter of PORST
switched-on (BYPASS = 0).
5) The setup/hold values are applicable for Port 0 and Port 4 input pins with noise suppression filter of HDRST
switched-on (BYPASS = 0), independently whether HDRST is used as input or output.
6) Not subject to production test, verified by design / characterization.
7) This parameter includes the delay of the analog spike filter in the PORST pad.
8) Not subject to production test, verified by design / characterization.
9) In case of power loss during internal flash write, prevents Flash write to random address.
10) Booting from Flash, the duration of the boot-time is defined between the rising edge of the PORST and the
moment when the first user instruction has entered the CPU and its processing starts.
11) Booting from Flash, the duration of the boot time is defined between the following events:
1. Hardware reset: the falling edge of a short HDRST pulse and the moment when the first user instruction has
entered the CPU and its processing starts, if the HDRST pulse is shorter than 1024 × T_SYS.
If the HDRST pulse is longer than 1024 × T_SYS, only the time beyond the 1024 × T_SYS should be added to the
boot time (HDRST falling edge to first user instruction).
2. Software reset: the moment of starting the software reset and the moment when the first user instruction
has entered the CPU and its processing starts
V_DDPPA
VDDP
V_DDPPA
VDD
t_oscs
OSC
PORST
HDRST
Pads
Pad-
state
undefined
t_POA
t_POA
t_hd
t_hd
2)
1)
2)
t_pi
1) as programmed
2) Tri-state, pull device active
Figure 4-11 Power, Pad and Reset Timing
V_DDPR
1)
2)
Pad-
state
undefined
reset_beh
Data Sheet
114
V1.0, 2008-04