MC68HC908QC16_07 Datasheet, PDF (54/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Analog-to-Digital Converter (ADC10) Module
3.7.5 ADC10 Channel Pins (ADn)
The ADC10 has multiple input channels. Empirical data shows that capacitors on the analog inputs
improve performance in the presence of noise or when the source impedance is high. 0.01 μF capacitors
with good high-frequency characteristics are sufficient. These capacitors are not necessary in all cases,
but when used they must be placed as close as possible to the package pins and be referenced to V_SSA.
3.8 Registers
These registers control and monitor operation of the ADC10:
• ADC10 status and control register, ADSCR
• ADC10 data registers, ADRH and ADRL
• ADC10 clock register, ADCLK
3.8.1 ADC10 Status and Control Register
This section describes the function of the ADC10 status and control register (ADSCR). Writing ADSCR
aborts the current conversion and initiates a new conversion (if the ADCH[4:0] bits are equal to a value
other than all 1s).
Bit 7
6
5
4
3
2
1
Read: COCO
AIEN
ADCO ADCH4 ADCH3 ADCH2 ADCH1
Write:
Reset: 0
0
0
1
1
1
1
= Unimplemented
Figure 3-3. ADC10 Status and Control Register (ADSCR)
Bit 0
ADCH0
1
COCO — Conversion Complete Bit
COCO is a read-only bit which is set each time a conversion is completed. This bit is cleared whenever
the status and control register is written or whenever the data register (low) is read.
1 = Conversion completed
0 = Conversion not completed
AIEN — ADC10 Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of a conversion. The interrupt signal is cleared
when the data register is read or the status/control register is written.
1 = ADC10 interrupt enabled
0 = ADC10 interrupt disabled
ADCO — ADC10 Continuous Conversion Bit
When this bit is set, the ADC10 will begin to convert samples continuously (continuous conversion
mode) and update the result registers at the end of each conversion, provided ADCH[4:0] do not
decode to all 1s. The ADC10 will continue to convert until the MCU enters reset, the MCU enters stop
mode (if ACLKEN is clear), ADCLK is written, or until ADSCR is written again. If stop is entered (with
ACLKEN low), continuous conversions will cease and can be restarted only with a write to ADSCR.
Any write to ADSCR with ADCO set and the ADCH bits not all 1s will abort the current conversion and
begin continuous conversions.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
54
Freescale Semiconductor