MC68HC908QC16_07 Datasheet, PDF (140/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Enhanced Serial Communications Interface (ESCI) Module
13.8.3 ESCI Control Register 3
ESCI control register 3 (SCC3):
• Stores the ninth ESCI data bit received and the ninth ESCI data bit to be transmitted.
• Enables these interrupts:
– Receiver overrun
– Noise error
– Framing error
– Parity error
Bit 7
Read: R8
Write:
Reset: U
6
5
T8
R
0
0
= Unimplemented
4
3
2
1
Bit 0
R
ORIE
NEIE
FEIE
PEIE
0
0
0
0
0
R
= Reserved U = Unaffected
Figure 13-11. ESCI Control Register 3 (SCC3)
R8 — Received Bit 8
When the ESCI is receiving 9-bit characters, R8 is the read-only ninth bit (bit 8) of the received
character. R8 is received at the same time that the SCDR receives the other 8 bits.
When the ESCI is receiving 8-bit characters, R8 is a copy of the eighth bit (bit 7).
T8 — Transmitted Bit 8
When the ESCI is transmitting 9-bit characters, T8 is the read/write ninth bit (bit 8) of the transmitted
character. T8 is loaded into the transmit shift register at the same time that the SCDR is loaded into
the transmit shift register.
ORIE — Receiver Overrun Interrupt Enable Bit
This read/write bit enables ESCI error interrupt requests generated by the receiver overrun bit, OR.
1 = ESCI error interrupt requests from OR bit enabled
0 = ESCI error interrupt requests from OR bit disabled
NEIE — Receiver Noise Error Interrupt Enable Bit
This read/write bit enables ESCI error interrupt requests generated by the noise error bit, NE.
1 = ESCI error interrupt requests from NE bit enabled
0 = ESCI error interrupt requests from NE bit disabled
FEIE — Receiver Framing Error Interrupt Enable Bit
This read/write bit enables ESCI error interrupt requests generated by the framing error bit, FE.
1 = ESCI error interrupt requests from FE bit enabled
0 = ESCI error interrupt requests from FE bit disabled
PEIE — Receiver Parity Error Interrupt Enable Bit
This read/write bit enables ESCI receiver interrupt requests generated by the parity error bit, PE.
1 = ESCI error interrupt requests from PE bit enabled
0 = ESCI error interrupt requests from PE bit disabled
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
140
Freescale Semiconductor