MC68HC908QC16_07 Datasheet, PDF (113/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Port C
11.5.2 Data Direction Register C
Data direction register C (DDRC) determines whether each port C pin is an input or an output. Writing a 1
to a DDRC bit enables the output buffer for the corresponding port C pin; a 0 disables the output buffer.
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
1
0
0
0
0
0
DDRC2 DDRC1
0
0
0
0
0
0
0
= Unimplemented
Figure 11-10. Data Direction Register C (DDRC)
Bit 0
DDRC0
0
DDRC[2:0] — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears DDRC[2:0], configuring all port C pins
as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1. Figure 11-11 shows the
port C I/O logic.
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
DDRCx
PTCx
PTCPUEx
PULLUP
PTCx
READ PTC ($0002)
Figure 11-11. Port C I/O Circuit
NOTE
Figure 11-11 does not apply to PTC3.
When DDRCx is a 1, reading address $0002 reads the PTCx data latch. When DDRCx is a 0, reading
address $0002 reads the voltage level on the pin. The data latch can always be written, regardless of the
state of its data direction bit.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
Freescale Semiconductor
113