MC68HC908QC16_07 Datasheet, PDF (145/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Registers
LINT
0
0
0
1
1
1
1
LINR
0
1
1
0
0
1
1
Table 13-5. ESCI LIN Control Bits
M
Functionality
X Normal ESCI functionality
0 11-bit break detect enabled for LIN receiver
1 12-bit break detect enabled for LIN receiver
0 13-bit generation enabled for LIN transmitter
1 14-bit generation enabled for LIN transmitter
0 11-bit break detect/13-bit generation enabled for LIN
1 12-bit break detect/14-bit generation enabled for LIN
SCP1 and SCP0 — ESCI Baud Rate Register Prescaler Bits
These read/write bits select the baud rate register prescaler divisor as shown in Table 13-6.
Table 13-6. ESCI Baud Rate Prescaling
SCP[1:0]
00
01
10
11
Baud Rate Register
Prescaler Divisor (BPD)
1
3
4
13
SCR2–SCR0 — ESCI Baud Rate Select Bits
These read/write bits select the ESCI baud rate divisor as shown in Table 13-7. Reset clears
SCR2–SCR0.
Table 13-7. ESCI Baud Rate Selection
SCR[2:1:0]
000
001
010
011
100
101
110
111
Baud Rate Divisor (BD)
1
2
4
8
16
32
64
128
13.8.8 ESCI Prescaler Register
The ESCI prescaler register (SCPSC) together with the ESCI baud rate register selects the baud rate for
both the receiver and the transmitter.
NOTE
There are two prescalers available to adjust the baud rate — one in the
ESCI baud rate register and one in the ESCI prescaler register.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
Freescale Semiconductor
145