MC68HC908QC16_07 Datasheet, PDF (166/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

System Integration Module (SIM)
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period. Figure 14-17 shows stop mode entry timing and
Figure 14-18 shows the stop mode recovery time from interrupt or break
NOTE
To minimize stop current, all pins configured as inputs should be driven to
a logic 1 or logic 0.
CPUSTOP
ADDRESS BUS
STOP ADDR
STOP ADDR + 1
SAME
SAME
DATA BUS
PREVIOUS DATA
NEXT OPCODE
SAME
SAME
R/W
NOTE: Previous data can be operand data or the STOP opcode, depending on the last instruction.
Figure 14-17. Stop Mode Entry Timing
BUSCLKX4
STOP RECOVERY PERIOD
INTERRUPT
ADDRESS BUS
STOP +1
STOP + 2 STOP + 2
SP
SP – 1
Figure 14-18. Stop Mode Recovery from Interrupt
SP – 2
SP – 3
14.8 SIM Registers
The SIM has three memory mapped registers. Table 14-4 shows the mapping of these registers.
Table 14-4. SIM Registers
Address
$FE00
$FE01
$FE03
Register
BSR
SRSR
BFCR
Access Mode
User
User
User
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
166
Freescale Semiconductor