MC68HC908QC16_07 Datasheet, PDF (108/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output Ports (PORTS)
11.3.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the six port A pins.
Bit 7
Read:
R
Write:
Reset:
Additional Functions:
6
5
4
3
2
1
Bit 0
PTA2
R
PTA5
PTA4
PTA3
PTA1
PTA0
Unaffected by reset
KBI5
KBI4
KBI3
KBI2
KBI1
KBI0
R
= Reserved
= Unimplemented
Figure 11-1. Port A Data Register (PTA)
PTA5–PTA3, PTA1, PTA0 — Port A Data Bits
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
PTA2 — Port A Data Bit
This read-only bit reads the state of the PTA2 pin.
KBI[5:0] — Port A Keyboard Interrupts
The keyboard interrupt enable bits, KBIE5–KBIE0, in the keyboard interrupt control enable register
(KBIER) enable the port A pins as external interrupt pins (see Chapter 8 Keyboard Interrupt Module
(KBI)).
11.3.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a 1
to a DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
Read:
Write:
Reset:
Bit 7
6
5
4
3
2
1
0
R
R
DDRA5 DDRA4 DDRA3
DDRA1
0
0
0
0
0
0
0
R
= Reserved
= Unimplemented
Figure 11-2. Data Direction Register A (DDRA)
Bit 0
DDRA0
0
DDRA[5:0] — Data Direction Register A Bits
These read/write bits control port A data direction. Reset clears DDRA[5:0], configuring all port A pins
as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
NOTE
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
108
Freescale Semiconductor