MC68HC908QC16_07 Datasheet, PDF (151/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

MEASURED TIME
RXD
ESCI Arbiter
Figure 13-21. Bit Time Measurement with ACLK = 1, Scenario A
MEASURED TIME
RXD
Figure 13-22. Bit Time Measurement with ACLK = 1, Scenario B
13.9.4 Arbitration Mode
If AM[1:0] is set to 10, the arbiter module operates in arbitration mode. On every rising edge of SCI_TxD
(output of the transmit shift register, see ), the counter is started. When the counter reaches $38
(ACLK = 0) or $08 (ACLK = 1), RxD is statically sensed. If in this case, RxD is sensed low (for example,
another bus is driving the bus dominant) ALOST is set. As long as ALOST is set, the TxD pin is forced
to 1, resulting in a seized transmission.
If SCI_TxD senses 0 without having sensed a 0 before on RxD, the counter will be reset, arbitration
operation will be restarted after the next rising edge of SCI_TxD.
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
Freescale Semiconductor
151