MC68HC908QC16_07 Datasheet, PDF (215/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Registers
17.8.3 TIM2 Counter Modulo Registers
The read/write TIM2 modulo registers contain the modulo value for the counter. When the counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the counter resumes counting from
$0000 at the next timer clock. Writing to the high byte (T2MODH) inhibits the TOF bit and overflow
interrupts until the low byte (T2MODL) is written. Reset sets the TIM2 counter modulo registers.
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 17-7. TIM2 Counter Modulo High Register (T2MODH)
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 17-8. TIM2 Counter Modulo Low Register (T2MODL)
NOTE
Reset the counter before writing to the TIM2 counter modulo registers.
17.8.4 TIM2 Channel Status and Control Registers
Each of the TIM2 channel status and control registers does the following:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare, or PWM operation
• Selects high, low, or toggling output on output compare
• Selects rising edge, falling edge, or any edge as the active input capture trigger
• Selects output toggling on TIM2 overflow
• Selects 0% and 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
Bit 7
6
5
4
3
2
1
Bit 0
Read: CH0F
Write: 0
CH0IE
MS0B
MS0A
ELS0B ELS0A
TOV0 CH0MAX
Reset: 0
0
0
0
0
0
0
0
Figure 17-9. TIM2 Channel 0 Status and Control Register (T2SC0)
Read:
Write:
Reset:
Bit 7
CH1F
0
0
6
5
0
CH1IE
0
0
= Unimplemented
4
MS1A
0
3
ELS1B
0
2
ELS1A
0
1
TOV1
0
Bit 0
CH1MAX
0
Figure 17-10. TIM2 Channel 1 Status and Control Register (T2SC1)
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
Freescale Semiconductor
215