MC68HC908QC16_07 Datasheet, PDF (116/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output Ports (PORTS)
11.6.3 Port D Input Pullup Enable Register
The port D input pullup enable register (PTDPUE) contains a software configurable pullup device for each
of the eight port D pins. Each bit is individually configurable and requires the corresponding data direction
register, DDRDx, be configured as input. Each pullup device is automatically and dynamically disabled
when its corresponding DDRDx bit is configured as output.
Bit 7
Read:
PTDPUE7
Write:
6
PTDPUE6
5
PTDPUE5
4
PTDPUE4
3
PTDPUE3
2
PTDPUE2
1
PTDPUE1
Bit 0
PTDPUE0
Reset: 0
0
0
0
0
0
0
0
Figure 11-16. Port D Input Pullup Enable Register (PTDPUE)
PTDPUE[7:0] — Port D Input Pullup Enable Bits
These read/write bits are software programmable to enable pullup devices on port D pins
1 = Corresponding port D pin configured to have internal pull if its DDRD bit is set to 0
0 = Pullup device is disconnected on the corresponding port D pin regardless of the state of its
DDRD bit.
Table 11-4 summarizes the operation of the port D pins.
Table 11-4. Port D Pin Functions
PTDPUE
Bit
1
0
X
DDRD
Bit
0
0
1
PTD
Bit
X⁽¹⁾
X
X
I/O Pin
Mode
Input, V_DD(2)
Input, Hi-Z⁽⁴⁾
Output
Accesses to DDRD
Read/Write
DDRD7–DDRD0
DDRD7–DDRD0
DDRD7–DDRD0
1. X = don’t care
2. I/O pin pulled to V_DD by internal pullup.
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
Accesses to PTD
Read
Write
Pin
PTD7–PTD0⁽³⁾
Pin
PTD7–PTD0⁽³⁾
PTD7–PTD0
PTD7–PTD0
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
116
Freescale Semiconductor