MC68HC908QC16_07 Datasheet, PDF (204/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module (TIM1)
16.8.5 TIM1 Channel Registers
These read/write registers contain the captured counter value of the input capture function or the output
compare value of the output compare function. The state of the TIM1 channel registers after reset is
unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the TIM1 channel x registers
(T1CHxH) inhibits input captures until the low byte (T1CHxL) is read.
In output compare mode (MSxB:MSxA ≠ 0:0), writing to the high byte of the TIM1 channel x registers
(T1CHxH) inhibits output compares until the low byte (T1CHxL) is written.
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
Figure 16-14. TIM1 Channel x Register High (T1CHxH)
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
Figure 16-15. TIM1 Channel Register Low (T1CHxL)
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
204
Freescale Semiconductor