MC68HC908QC16_07 Datasheet, PDF (137/274 Pages) Freescale Semiconductor, Inc – Microcontrollers

Registers
ENSCI — Enable ESCI Bit
This read/write bit enables the ESCI and the ESCI baud rate generator. Clearing ENSCI sets the SCTE
and TC bits in ESCI status register 1 and disables transmitter interrupts.
1 = ESCI enabled
0 = ESCI disabled
TXINV — Transmit Inversion Bit
This read/write bit reverses the polarity of transmitted data.
1 = Transmitter output inverted
0 = Transmitter output not inverted
NOTE
Setting the TXINV bit inverts all transmitted values including idle, break,
start, and stop bits.
M — Mode (Character Length) Bit
This read/write bit determines whether ESCI characters are eight or nine bits long (see Table 13-4).
The ninth bit can serve as a receiver wakeup signal or as a parity bit.
1 = 9-bit ESCI characters
0 = 8-bit ESCI characters
Table 13-4. Character Format Selection
Control Bits
M PEN:PTY
0
0X
1
0X
0
10
0
11
1
10
1
11
Start Bits
1
1
1
1
1
1
Data Bits
8
9
7
7
8
8
Character Format
Parity Stop Bits
None
1
None
1
Even
1
Odd
1
Even
1
Odd
1
Character Length
10 bits
11 bits
10 bits
10 bits
11 bits
11 bits
WAKE — Wakeup Condition Bit
This read/write bit determines which condition wakes up the ESCI: a 1 (address mark) in the MSB
position of a received character or an idle condition on the RxD pin.
1 = Address mark wakeup
0 = Idle line wakeup
ILTY — Idle Line Type Bit
This read/write bit determines when the ESCI starts counting 1s as idle character bits. The counting
begins either after the start bit or after the stop bit. If the count begins after the start bit, then a string
of 1s preceding the stop bit may cause false recognition of an idle character. Beginning the count after
the stop bit avoids false idle character recognition, but requires properly synchronized transmissions.
1 = Idle character bit count begins after stop bit
0 = Idle character bit count begins after start bit
PEN — Parity Enable Bit
This read/write bit enables the ESCI parity function (see Table 13-4). When enabled, the parity
function inserts a parity bit in the MSB position (see Table 13-2).
1 = Parity function enabled
0 = Parity function disabled
MC68HC908QC16 • MC68HC908QC8 • MC68HC908QC4 Data Sheet, Rev. 3
Freescale Semiconductor
137