33742_08 Datasheet, PDF (40/70 Pages) Freescale Semiconductor, Inc – System Basis Chip with Enhanced High Speed CAN Transceiver

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
CAN SLEEP MODE
The 33742 offers two CAN Sleep modes:
• Sleep mode with CAN wake-up enable: detection of
incoming CAN message and SBC wake-up.
• Sleep mode with CAN wake-up disable: no detection of
incoming CAN message.
The CAN Sleep modes are set via the CAN SPI register.
In CAN Sleep mode (with wake-up enable or disable), the
CAN interface is internally supplied from the VSUP pin. The
voltage at V2 pin can be either 5.0V or turned off. When the
CAN is in Sleep mode, the current sourced from V2 is
extremely low. In most cases the V2 voltage is off; however,
the CAN can be placed into Sleep mode even with 5.0V
applied on V2.
In CAN Sleep mode, the CANH and CANL drivers are
disabled, and the receiver is also disabled. CANH and CANL
are high-impedance mode to ground.
CAN SIGNALS IN TXRX AND SLEEP MODES
When the CAN interface is set back into TXRX mode by an
SPI command, CAN H and CANL are set in recessive level.
This is illustrated in Figure 21.
TXD
2.5V
CANH
CANL
CANH Dominant
CANL Dominant
CANL/CANH Recessive
Ground
RXD
CAN in TXRX Mode
CAN in Sleep Mode
(Wake-up Enable or Disable)
CAN in TXRX Mode
(Controlled by SPI Command)
Figure 21. CAN Signals in TXRX and Sleep Modes
CAN IN SLEEP MODE WITH WAKE-UP ENABLE
When the CAN interface is in Sleep mode with wake-up
enable, the CAN bus traffic is detected. The CAN bus wake-
up is a pattern wake-up.
PATTERN WAKE-UP
In order to wake up the CAN interface, the following criteria
must be fulfilled:
• The CAN interface wake-up receiver must receive a series
of three consecutive valid dominant pulses, each of which
must be longer than 500ns and shorter than 500μs.
• The distance between 2 pulses must be lower than 500μs.
• The three pulses must occur within a time frame of 1.0ms.
The pattern wake-up of the 33742 CAN interface allow
wake-up by any CAN message content.
Figure 22 below illustrates the CAN signals during a CAN
bus Sleep state and wake-up sequence.
33742
40
Analog Integrated Circuit Device Data
Freescale Semiconductor