33742_08 Datasheet, PDF (35/70 Pages) Freescale Semiconductor, Inc – System Basis Chip with Enhanced High Speed CAN Transceiver

Watchdog: Timeout 350ms
Normal Request
Reset Counter
(3.4ms) Expired
Reset
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Power
Down
Normal
SPI: MCR (0000) and Normal Debug
Normal Debug
SPI: MCR (0000) and Standby Debug
Standby Debug
Stop (1)
R
Wake-up
Figure 16. Transitions to Enter Debug Modes
Watchdog: Timeout 350ms
Normal Request
Reset Counter
(3.4ms) Expired
Reset
Wake-up
R
Wake-up
R
Watchdog: _Trigger
R
R
R
Stop Debug
Standby
SPI: _{Normal Debug}
E
SPI: ^{Standby Debug}
E
Normal
Sleep
Standby Debug
SPI: Standby Debug
SPI: Normal Debug
Normal Debug
R
R
(1) If Stop mode is entered, it is entered without watchdog, no matter the WDSTOP bit.
(E) Debug mode entry point (Step 5 of the Debug mode entering sequence).
(R) Represents transitions to Reset mode due to V1 low.
Figure 17. Simplified 33742S State Diagram in Debug Modes
Analog Integrated Circuit Device Data
Freescale Semiconductor
33742
35