33742_08 Datasheet, PDF (29/70 Pages) Freescale Semiconductor, Inc – System Basis Chip with Enhanced High Speed CAN Transceiver

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Table 7. Table of Operations
Mode
Voltage Regulator
HS Switch
Wake-up
Capabilities
(if Enabled)
RST Pin
INT Pin
Watchdog
Software
CAN Cell
Normal
Request
VDD: ON,
V2: OFF,
HS: OFF
–
Low for t _RSTDUR time,
–
–
–
then HIGH
Normal
VDD: ON,
V2: ON,
HS: Controllable
–
Normally HIGH. If enabled, signal Running
TXD / RXD
Active LOW if WDOG failure (VDD
or V_DD under-voltage Pre-warning
occurs
Temp, CAN, HS)
Standby
VDD: ON,
V2: OFF,
HS: Controllable
–
Same as Normal Same as Normal Running
Low power
mode
mode
Stop
VDD: ON
(Limited Current
Capability),
V2: OFF,
HS:OFF or Cyclic Sense
CAN, SPI, L0 : L3,
Cyclic Sense,
Forced Wake-up,
I_DD Over-current⁽⁴⁰⁾
Normally HIGH.
Active LOW if
WDOG⁽⁴¹⁾
or VDD under-voltage
occurs
Signal 33742S
wake-up and
I_DD > I_DDS-WU
(not maskable)
Running if
Low power.
enabled. Wake-up capability
Not running if
if enabled
disabled
Sleep
VDD: OFF,
V2: OFF,
HS: OFF or Cyclic
CAN, SPI,
L0 : L3, Cyclic Sense
Forced Wake-up
LOW
Not Active
Not running
Low power.
Wake-up capability
if enabled
Normal
Debug⁽³⁹⁾
Same as Normal
–
Normally HIGH. Same as Normal Not running Same as Normal
Active LOW if VDD
under-voltage occurs
Standby
Debug⁽³⁹⁾
Same as Standby
–
Normally HIGH. Same as Standby Not running Same as Standby
Active LOW if VDD
under-voltage occurs
Stop
Debug⁽³⁹⁾
Same as Stop
Same as Stop
Normally HIGH.
Active LOW if VDD
under-voltage occurs
Same as Stop
Not running
Same as Stop
Flash
Forced externally
–
Not operating
Not operating Not operating Not operating
Programming
Notes
39. Mode entered via special sequence described under the heading Debug Mode: Hardware and Software Debug with the 33742,
beginning on page 34.
40. I_DD over-current always enabled.
41. WDOG if enabled.
APPLICATION WAKE-UP FROM THE 33742
When the application is in Stop mode, it can be awakened
from the SBC side. When a wake-up condition is detected by
the SBC (for example, CAN, wake-up input), the 33742
enters the Normal Request mode and generates an interrupt
pulse at the INT pin.
APPLICATION WAKE-UP FROM THE MCU
When the device is in the Stop mode, a wake-up event
may come from the system MCU. In this case the MCU
selects the device the using a LOW-to-HIGH transition on the
33742 CS pin. Then the 33742S goes into Normal Request
mode and generates an interrupt pulse at the INT pin.
STOP MODE CURRENT MONITOR
If the VDD output current exceeds an internal set threshold
(I_DDS-WU), the SBC automatically enters the Normal Request
mode and generates an interrupt at the INT pin. The interrupt
is a non-maskable and the INTR register will have no flag set.
INTERRUPT GENERATION WHEN WAKE-UP
FROM STOP MODE
When the SBC wakes from Stop mode, it first enters the
Normal Request mode before generating a 10 μs typical
pulse on the INT pin. These are non-maskable interrupts with
the wake-up event read through the SPI registers, the
CANWU bit in the CAN Register (CANR), or the LCTRx bit in
the Wake-up Register (WUR). In case of wake-up from Stop
Analog Integrated Circuit Device Data
Freescale Semiconductor
33742
29