33742_08 Datasheet, PDF (28/70 Pages) Freescale Semiconductor, Inc – System Basis Chip with Enhanced High Speed CAN Transceiver

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
NORMAL MODE
In Normal mode, both the VDD and V2 regulators are in
the ON state. All functions are available in this operating
mode (watchdog, wake-up input reading through SPI, HS
activation, and CAN communication). The watchdog timer is
running and must be periodically cleared through SPI.
STOP MODE
The V2 regulator is turned OFF by disabling the V2CTRL
pin. The VDD regulator is activated in a special low power
mode supplying only a few mA of current. This maintains
“keep alive” power for the application’s MCU while the MCU
is in a power-saving state (i.e., a MCU’s version of Stop or
Wait). In the Stop mode, the supply current available from
VSUP pin is very low.
Both parts (the SBC or the MCU) can be awakened from
either the 33742 side (for example, cyclic sense, forced
wake-up, CAN message, wake-up inputs, and over-current
on VDD) or from the MCU side (key wake-up, etc.).
Stop mode is always selected via SPI. In Stop mode, the
watchdog software may be either running or not running
depending upon selection by SPI (Reset Control Register
[RCR], bit WDSTOP). To clear a running watchdog timer, the
SBC must be awakened using the CS pin (SPI wake-up). In
Stop mode, wake-up is identical to that in Sleep mode, with
the addition of CS and VDD over-current wake-up. Refer to
Table 7, page 29.
SLEEP MODE
In Sleep mode, the VDD and V2 regulators are OFF.
Current consumption from the VSUP pin is cut. In Sleep
mode, the SBC can be awakened by sensing individual level
individual level changes in the L0 : L3 inputs, by cyclic
checking of the L0 : L3 inputs, by the forced wake-up timer, or
from the CAN physical interface upon receiving a CAN
message. When a wake-up occurs, the SBC goes first into
the Reset mode before entering Normal Request mode.
RESET MODE
In the Reset mode, the RST pin is LOW and a timer runs
for t _RSTDUR time. After t _RSTDUR has elapsed, the 33742
enters the Normal Request operating mode. The Reset mode
is entered if a reset condition occurs (VDD LOW, watchdog
time-out, or watchdog trigger in a closed window).
NORMAL REQUEST MODE
The Normal Request mode is a temporary operating mode
automatically entered by the SBC after the Reset mode or
after the 33742 wakes up from the Stop mode.
After a wake-up from the Sleep mode or after a device
power-up, the SBC enters the Reset mode prior to entering
the Normal Request mode. After a wake-up from the Stop
mode, the 33742 enters the Normal Request mode directly.
In Normal Request mode, the VDD regulator is ON, the V2
regulator is OFF, and the RST pin is HIGH. As soon as the
SBC enters the Normal Request mode, an internal 350ms
timer is started (parameter t_NRTOUT). During this time, the
application’s MCU must address the 33742 via SPI and
configure the TIM1 sub register to select the watchdog
period. This is required of the SBC to stop the 350ms
watchdog timer and enter the Normal or Standby mode and
to set the watchdog timer configuration.
NORMAL REQUEST ENTERED AND NO
WATCHDOG CONFIGURATION OCCURS
If the Normal Request mode is entered after the SBC
powers up or after a wake-up from Stop mode and no
watchdog configuration occurs before the 350ms time period
has expired, the device enters the Reset mode. If no
watchdog configuration is performed, the 33742 will cycle
from the Normal Request mode to Reset mode to Normal
Request mode.
If the Normal Request mode is entered after a wake-up
from Sleep mode, and no watchdog configuration occurs
while the 33742S is in Normal Request mode, the SBC
returns to the Sleep mode.
33742
28
Analog Integrated Circuit Device Data
Freescale Semiconductor