33742_08 Datasheet, PDF (26/70 Pages) Freescale Semiconductor, Inc – System Basis Chip with Enhanced High Speed CAN Transceiver

FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
MCU INTERFACE
SPI INTERFACE
The IC and the MCU communicate using the SPI control
and status reporting registers. The clock speed (SCLK) can
be as high as 4.0MHz.
RESET & INT
These 2 outputs notify the MCU when the IC is in reset
mode, or when an enabled interrupt condition has occurred.
WATCHDOG TIMER
The timer can be used as a watchdog window or watchdog
timeout function. The SPI control register provide the choice
as well as the timeout value. When the watchdog timer is not
properly serviced by the MCU, an error signal (WDOGN low)
and a reset signal (RSTN low) are output.
CAN INTERFACE/CONTROL
The operation of the CAN interface is controlled by the
MCU through the use of SPI control register bits.
33742
26
Analog Integrated Circuit Device Data
Freescale Semiconductor