33742_08 Datasheet, PDF (31/70 Pages) Freescale Semiconductor, Inc – System Basis Chip with Enhanced High Speed CAN Transceiver

FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Table 8. Watchdog and Reset Output Operation
Events
WDOG
Output
Device Power-Up
LOW to HIGH
V_DD Normal, WDOG Properly Triggered
V_DD < V_RSTTH
WDOG Time-out Reached
HIGH
HIGH
LOW ⁽⁴²⁾
Notes
42. WDOG stays LOW until the TIM1 register is properly addressed through SPI.
RST Output
LOW to HIGH
HIGH
LOW
LOW
V_SUP
V_DD
RST
WDOG
SPI
Mode
Device power up
RESET N-Request Normal
V_DD
RST
WDOG
SPI
SPI CS
Device is in Normal mode, W/D refresh failure
Watchdog
Period
Power up
Watchdog refresh failure
V_SUP
V_DD
RST
WDOG
SPI
Mode Sleep
Device is in sleep mode
RESET N-Request Normal
Device is in stop mode
V_SUP
V_DD
INT
WDOG
SPI
Mode Stop
N-Request Normal
Wake up event
Wake-up event
Legend: TIM1 register write
Figure 12. RST and WDOG Output Operation
WAKE-UP CAPABILITIES
Several wake-up capabilities are available to the SBC
when it is in Sleep or Stop mode. When a wake-up has
occurred, the wake-up event is stored in the Wake-up
Register (WUR) or the CAN register and read by the MCU to
determine the wake-up source. The wake-up options are
selectable through SPI while the 33742 is in Normal or
Standby mode and prior to entering low power modes (Sleep
or Stop mode). When a wake-up occurs in Sleep mode, the
SBC reactivates the VDD supply. It generates an interrupt if
a wake-up occurs from Stop mode.
WAKE-UP FROM WAKE-UP INPUTS (L0 : L3)
WITHOUT CYCLIC SENSE
The wake-up lines are used to determine the state of
external switches and if changes occurred to wake up the
MCU (in Sleep or Stop modes). The wake-up pins L0 : L3 are
able to handle up to 40VDC. The internalize” threshold is
3.0V typical, and these inputs can be used as an input port
Analog Integrated Circuit Device Data
Freescale Semiconductor
33742
31