XRT83L34_05 Datasheet, PDF (98/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L34
xr
REV. 1.0.1 QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REVISIONS
REVISION
DESCRIPTION
A1.0.1
thru
A1.0.7
Advanced Versions
P1.1.0 Preliminary release version
P1.2.0
Added GHCI_n, SL_1, SL_0, EQG_1 and EQG_0 to Control Global Register 131. Separated Micropro-
cessor description table by register number. Moved absolute maximum and Dc electrical characteristics
before AC electrical characteristics. Replaced TBD’s in electrical ables. Reformated table of contents.
P1.2.1 Added GAUGE1 and GAUGE0 to Control Global Register 131. Corrected control register binary bits.
P1.2.2 Renamed FIFO pin to GAUGE, edited definition and edited defintion of JASEL[1:0] to reflect the FIFO
size is selected by the jitter attenuator select.
P1.2.3 Redefined bits D3, D2 and D0 of register 1, in combination these bits set the jitter attenuator path and
FIFO size.
P1.2.4 Corrected typos in figures 6 and 8. Added Jitter attenuator tables in microprocessor register tables. Mod-
ified microprocessor descrptions, timing diagrams and electrical characteristics.
P1.2.5 Replaced GCHIE with Reserved in Tables 18, 23, 24,25. In the pin list description for INT, replace IMASK
bit to a “1” with GIE bit to a “0”.
P1.2.6 New description for bits D6 - D0 in Tables 27 - 34 Microprocessor Registers.
P1.2.7 Revised Microprocessor interface timing diagrams and data.
P1.2.8 Corrected microprocessor timing information and edited Redundancy section.
P1.2.9 Edited section on RLOS for more detailed explanation.
P1.3.0 Changed definition of TXON_n pin. RXON_n bit included in register tables. Rx transformer ratio changed
from 2:1 to 1:1. Description of Arbitrary Pulse and Gap Clock support added.
P1.3.1 Minor edits to block diagram, changed issue date to January, corrected register 67 in table 18, corrected
table 37.
P1.3.2 Swapped the function of µPTS1 and µPTS2. Replaced µProcessor timing diagrams and timing informa-
tion, (Figures 29 and 30 -- Tables 49 and 50).
P1.3.3 Updated the Power Consumption numbers.
P1.3.4 Added the New E1 Arbitrary Pulse Feature. Added descriptions to the global registers.
1.0.0 Final Release.
1.0.1 Added Microprocessor Section. Removed Sychronous Microprocessor modes.
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