XRT83L34_05 Datasheet, PDF (42/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L34
xr
REV. 1.0.1 QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TABLE 10: TRANSMIT TERMINATION CONTROL
TRATIO
0
1
TURNS RATIO
1:2
1:2.45
Table 11 summarizes the transmit terminations.
TERSEL1
TABLE 11: TRANSMIT TERMINATIONS
TERSEL0 TXTSEL TRATIO
R_int Ω
0=EXTERNAL
1=INTERNAL
SET BY
CONTROL
BITS
n
R_ext Ω
C_ext
n, R_ext, AND C_ext ARE SUGGESTED
SETTINGS
0
T1
0
100 Ω
0
0
0
0
0Ω
2.45
3.1Ω
0
0
0
1
0Ω
2
3.1Ω
0
0
1
x
12.5Ω
2
0Ω
0.68µF
0
J1
0
110 Ω
0
1
0
0
0Ω
2.45
3.1Ω
0
1
0
1
0Ω
2
3.1Ω
0
1
1
x
13.75Ω
2
0Ω
0.68µF
1
E1
1
75 Ω
1
0
0
0
0Ω
2.45
6.2Ω
0
0
0
1
0Ω
2
9.1Ω
0
0
1
x
9.4Ω
2
0Ω
0.68µF
1
E1
1
120 Ω
1
1
0
0
0Ω
2.45
6.2Ω
0
1
0
1
0Ω
2
9.1Ω
0
1
1
x
15Ω
2
0Ω
0.68µF
REDUNDANCY APPLICATIONS
Telecommunication system design requires signal integrity and reliability. When a T1/E1 primary line card has
a failure, it must be swapped with a backup line card while maintaining connectivity to a backplane without
losing data. System designers can achieve this by implementing common redundancy schemes with the
XRT83L34 Line Interface Unit (LIU). The XRT83L34 offers features that are tailored to redundancy applications
while reducing the number of components and providing system designers with solid reference designs. These
features allow system designers to implement redundancy applications that ensure reliability. The Internal
Impedance mode eliminates the need for external relays when using the 1:1 and 1+1 redundancy schemes.
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