XRT83L34_05 Datasheet, PDF (46/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L34
xr
REV. 1.0.1 QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
RECEIVE
For N+1 redundancy, the receivers on the primary cards should be programmed for internal impedance mode.
The receivers on the backup card should be programmed for external impedance mode. Since there is no
external resistor in the circuit, the receivers on the backup card will be high impedance. Select the impedance
for the desired mode of operation, T1/E1/J1. To swap the primary card, set the backup card to internal
impedance mode, then the primary card to external impedance mode. See Figure 19. for a simplified block
diagram of the receive section for a N+1 redundancy scheme.
NOTE: For simplification, the over voltage protection circuitry was omitted.
FIGURE 19. SIMPLIFIED BLOCK DIAGRAM - RECEIVE SECTION FOR N+1 REDUNDANCY
Backplane Interface
Line Interface Card
Primary Card
XRT83L34
Rx
RxTSEL=1, Internal
1:1
T1/E1 Line
Primary Card
XRT83L34
Rx
RxTSEL=1, Internal
1:1
T1/E1 Line
Primary Card
XRT83L34
Rx
RxTSEL=1, Internal
1:1
T1/E1 Line
Backup Card
XRT83L34
Rx
RxTSEL=1, External
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