XRT83L34_05 Datasheet, PDF (53/99 Pages) Exar Corporation – QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

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XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.1
TABLE 16: MICROPROCESSOR INTERFACE SIGNAL DESCRIPTION
ALE_AS
Address Latch Enable/Address Strobe Input:
The exact function of this input pin depends upon which mode the Microprocessor Interface has been
configured to operate in, as described below.
Intel-Asynchronous Mode - Address Latch Enable - ALE:
If the Microprocessor Interface has been configured to operate in the Intel-Asynchronous Mode, then
this active-high input pin is used to latch the data (residing on the Address Bus, A[6:0] into the Micro-
processor Interface circuitry of the XRT83L34 device and to indicate the start of a READ or WRITE
cycle.
Pulling this input pin "high" enables the input bus drivers for the Address Bus input pins. The contents
of the Address Bus will be latched into the Microprocessor Interface circuitry, upon the falling edge of
this input signal.
Motorola-Asynchronous Mode - Address Strobe - AS*:
If the Microprocessor Interface has been configured to operate in the Motorola-Asynchronous Mode,
then pulling this input pin "LOW enables the "input" bus drivers for the Address Bus Input pins.
During each READ or WRITE operation, the user is expected to drive this input pin "LOW" after (or
around the time that) he/she has places the address (of the "target" register) onto the Address Bus
pins (A[6:0]). The user is then expected to hold this input pin "LOW" for the remainder of the READ or
WRITE cycle.
NOTE: It is permissible to tie the ALE_AS* and CS* input pins together.. Read and Write operations
will be performed properly if ALE_AS is driven "LOW" coincident to whenever CS* is also
driven "LOW".
CS
Chip Select Input:
The user must assert this active-low signal in order to select the Microprocessor Interface for READ
and WRITE operations between the Microprocessor and the XRT83L34 on-chip registers.
RD_DS
Read Strobe/Data Strobe Input Pin:
The exact function of this input pin depends upon which mode the Microprocessor Interface has been
configured to operate in, as described below.
Intel-Asynchronous Mode - READ Strobe Input - RD*:
If the Microprocessor Interface is operating in the Intel-Asynchronous Mode, then this input pin will
function as the RD* (Active-Low READ Strobe) input signal from the Microprocessor. Once this
active-low signal is asserted, then the XRT83L34 device will place the contents of the addressed reg-
ister on the Microprocessor Interface Bi-Directional Data Bus (D[7:0]). When this signal is negated,
then the Data Bus will be tri-stated.
Motorola-Asynchronous Mode - Data Strobe Input - DS*:
If the Microprocessor Interface is operating in the Motorola-Asynchronous Mode, then this input pin
will function as the DS* (Data Strobe) input signal.
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